/* configure the CPU type */
OUTPUT_ARCH(arm)
/* link with the standard c library */
INPUT(-lc)
/* link with the standard GCC library */
INPUT(-lgcc)
/* configure the entry point */
ENTRY(vectors)
 
MEMORY
{
    /* the internal SRAM */
    rom (wx) : ORIGIN = 0x0, LENGTH = 128K
    ram (wx) : ORIGIN = 0x400000, LENGTH = 128K

    /* the shared RAM */
    sharedram (rw!x) : ORIGIN = 0x10000000, LENGTH = 256K
    
    /* Fake LA memory */
    lamac_memory (!rx) : ORIGIN = 0x11000000, LENGTH = 1024K
    laphy_memory (!rx) : ORIGIN = 0x11800000, LENGTH = 1024K

    /* the MACHW MIB location */
    machw_mib_loc (rw!x) : ORIGIN = 0x10B00800, LENGTH = 1K
}

/* configure the stack sizes */
stack_len_fiq = 0x3F0;
stack_len_irq = 0x10;
stack_len_svc = 0x3F0;
stack_len_unused = 0x10;

SECTIONS
{


        /* shared RAM */
    SHAREDRAM ORIGIN(sharedram) :
    {
        _sshram = . ;
        *ipc_shared.o(COMMON)
        *hal_desc.o(COMMON)
        *txl_buffer_shared.o(COMMON)
        *txl_frame_shared.o(COMMON)
        *la_shared.o(COMMON)
        _eshram = . ;
    }

    /* MAC logic analyzer RAM */
    LARAMMAC :
    {
        _slarammac = . ;
        *la_mem_mac.o(COMMON)
        _elarammac = . ;
    } > lamac_memory

    /* PHY logic analyzer RAM */
    LARAMPHY :
    {
        _slaramphy = . ;
        *la_mem_phy.o(COMMON)
        _elaramphy = . ;
    } > laphy_memory

    /* MAC HW MIBs */
    MACHW_MIB ORIGIN(machw_mib_loc) :
    {
        _smachw_mib = . ;
        *hal_mib.o(COMMON)
        _emachw_mib = . ;
    } > machw_mib_loc

    EXEC_RAM_TEXT 0x0 :
    {
        /* the address 0 must contain the boot vectors */
        *boot_vectors.o(.text)
        /* immediately followed by the boot handlers */
        *boot_handlers.o(.text)
        *(.text)
        *(.rodata)
    } > rom
    
    /* ram data immediately follows the TEXT */
    RAM_DATA   :
    {
        *(.data)
    } > ram AT > rom

    /* BSS section */
    RAM_BSS :
    {
        bss_base = .;
        *(.bss)
        *(COMMON)
        bss_end = .;
    } > ram AT > rom
    bss_length = bss_end - bss_base;

    /* UNUSED STACK */
    RAM_STACK_UNUSED ORIGIN(ram) + LENGTH(ram) - stack_len_fiq - stack_len_irq - stack_len_svc - stack_len_unused :
    {
        stack_base_unused = .;
        *ipc_shared.o(.bss)
        . = stack_len_unused;
    } > ram AT > rom

    /* SVC STACK */
    RAM_STACK_SVC ORIGIN(ram) + LENGTH(ram) - stack_len_fiq - stack_len_irq - stack_len_svc :
    {
        stack_base_svc = .;
        . = stack_len_svc;
    } > ram AT > rom

    /* IRQ STACK */
    RAM_STACK_IRQ ORIGIN(ram) + LENGTH(ram) - stack_len_fiq - stack_len_irq :
    {
        stack_base_irq = .;
        . = stack_len_irq;
    } > ram AT > rom

    /* FIQ STACK */
    RAM_STACK_FIQ ORIGIN(ram) + LENGTH(ram) - stack_len_fiq :
    {
        stack_base_fiq = .;
        . = stack_len_fiq;
    } > ram AT > rom





}

