Next: C-SKY Syntax, Up: C-SKY-Dependent [Contents][Index]
-march=archnameAssemble for architecture archname. The --help option lists valid values for archname.
-mcpu=cpunameAssemble for architecture cpuname. The --help option lists valid values for cpuname.
-EL-mlittle-endianGenerate little-endian output.
-EB-mbig-endianGenerate big-endian output.
-fpic-picGenerate position-independent code.
-mljump-mno-ljumpEnable/disable transformation of the short branch instructions
jbf, jbt, and jbr to jmpi.
This option is for V2 processors only.
It is ignored on CK801 and CK802 targets, which do not support the jmpi
instruction, and is enabled by default for other processors.
-mbranch-stub-mno-branch-stubPass through R_CKCORE_PCREL_IMM26BY2 relocations for bsr
instructions to the linker.
This option is only available for bare-metal C-SKY V2 ELF targets, where it is enabled by default. It cannot be used in code that will be dynamically linked against shared libraries.
-force2bsr-mforce2bsr-no-force2bsr-mno-force2bsrEnable/disable transformation of jbsr instructions to bsr.
This option is always enabled (and -mno-force2bsr is ignored)
for CK801/CK802 targets. It is also always enabled when
-mbranch-stub is in effect.
-jsri2bsr-mjsri2bsr-no-jsri2bsr-mno-jsri2bsrEnable/disable transformation of jsri instructions to bsr.
This option is enabled by default.
-mnolrw-mno-lrwEnable/disable transformation of lrw instructions into a
movih/ori pair.
-melrw-mno-elrwEnable/disable extended lrw instructions.
This option is enabled by default for CK800-series processors.
-mlaf-mliterals-after-func-mno-laf-mno-literals-after-funcEnable/disable placement of literal pools after each function.
-mlabr-mliterals-after-br-mno-labr-mnoliterals-after-brEnable/disable placement of literal pools after unconditional branches. This option is enabled by default.
-mistack-mno-istackEnable/disable interrupt stack instructions. This option is enabled by default on CK801, CK802, and CK802 processors.
The following options explicitly enable certain optional instructions.
These features are also enabled implicitly by using -mcpu= to specify
a processor that supports it.
-mhard-floatEnable hard float instructions.
-mmpEnable multiprocessor instructions.
-mcpEnable coprocessor instructions.
-mcacheEnable cache prefetch instruction.
-msecurityEnable C-SKY security instructions.
-mtrustEnable C-SKY trust instructions.
-mdspEnable DSP instructions.
-medspEnable enhanced DSP instructions.
-mvdspEnable vector DSP instructions.
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